577 lines
18 KiB
C
577 lines
18 KiB
C
/*
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* Copyright (c) 2020, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*!****************************************************************************
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* @file dl_mathacl.h
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* @brief Math Accelerator Driver Library
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* @defgroup MATHACL Math Accelerator (MATHACL)
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*
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* @anchor ti_dl_dl_m0p_mathacl_Overview
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* # Overview
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*
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* The Math Accelerator Driver Library provides software to control the
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* onboard Math Accelerator hardware.
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*
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******************************************************************************
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*/
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/** @addtogroup MATHACL
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* @{
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*/
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#ifndef ti_dl_dl_mathacl__include
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#define ti_dl_dl_mathacl__include
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#include <stdbool.h>
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#include <stdint.h>
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#include <ti/devices/msp/msp.h>
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#include <ti/driverlib/dl_common.h>
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#ifdef __MSPM0_HAS_MATHACL__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* clang-format off */
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/** @addtogroup DL_MATHACL_STATUS
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* @{
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*/
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/*!
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* @brief MATHACL operation underflow status
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*/
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#define DL_MATHACL_STATUS_UNDERFLOW (MATHACL_STATUS_UF_UNDERFLOW)
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/*!
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* @brief MATHACL generic underflow bitmask for MATHACL Status register comparison
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*/
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#define DL_MATHACL_STATUS_UF_MASK (MATHACL_STATUS_UF_MASK)
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/*!
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* @brief MATHACL operation overflow status
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*/
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#define DL_MATHACL_STATUS_OVERFLOW (MATHACL_STATUS_OVF_OVERFLOW)
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/*!
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* @brief MATHACL generic overflow bitmask for MATHACL Status register comparison
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*/
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#define DL_MATHACL_STATUS_OVF_MASK (MATHACL_STATUS_OVF_MASK)
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/*!
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* @brief MATHACL divide by error status
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*/
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#define DL_MATHACL_STATUS_ERR_DIVBY0 (MATHACL_STATUS_ERR_DIVBY0)
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/*!
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* @brief MATHACL generic error bits mask
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*/
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#define DL_MATHACL_STATUS_ERR_MASK (MATHACL_STATUS_ERR_MASK)
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/*!
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* @brief Alias for one-shot sin/cos operation
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*/
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#define DL_MathACL_startSinCosOperation(MATHACL, config, op) DL_MathACL_configOperation(MATHACL, config, op, 0)
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/*!
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* @brief Alias for one-shot inverse 4-quadrant arctan operation
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*/
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#define DL_MathACL_startArcTan2Operation(MATHACL, config, x, y) DL_MathACL_configOperation(MATHACL, config, x, y)
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/*!
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* @brief Alias for one-shot arctan operation
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*/
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#define DL_MathACL_startArcTanOperation(MATHACL, config, x) DL_MathACL_configOperation(MATHACL, config, x, 0)
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/*!
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* @brief Alias for one-shot divide
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*/
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#define DL_MathACL_startDivOperation(MATHACL, config, num, den) DL_MathACL_configOperation(MATHACL, config, num, den)
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/*!
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* @brief Alias for one-shot square root operation
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*/
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#define DL_MathACL_startSqrtOperation(MATHACL, config, sqrt) DL_MathACL_configOperation(MATHACL, config, sqrt, 0)
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/*!
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* @brief Alias for one-shot multiply operation
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*/
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#define DL_MathACL_startMpyOperation(MATHACL, config, multicand, multiplier) DL_MathACL_configOperation(MATHACL, config, multicand, multiplier)
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/** @}*/
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/* clang-format on */
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/*! @enum DL_MATHACL_OP_TYPE */
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typedef enum {
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/*! Sin or cosine operation */
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DL_MATHACL_OP_TYPE_SINCOS = MATHACL_CTL_FUNC_SINCOS,
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/*! Arc tangent 2 operation -- takes in X, Y values */
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DL_MATHACL_OP_TYPE_ARCTAN2 = MATHACL_CTL_FUNC_ATAN2,
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/*! Divide operation -- takes in numerator, denominator, division type */
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DL_MATHACL_OP_TYPE_DIV = MATHACL_CTL_FUNC_DIV,
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/*! Square root operation -- requires that a scaling factor be provided as well */
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DL_MATHACL_OP_TYPE_SQRT = MATHACL_CTL_FUNC_SQRT,
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/*! Multiply operation returns 32-bit result -- takes in two operands */
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DL_MATHACL_OP_TYPE_MPY_32 = MATHACL_CTL_FUNC_MPY32,
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/*! Square operation returns 32-bit result -- takes in one operand. Supports
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* Q and int data formats. Enable saturation with @ref
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* DL_MathACL_enableSaturation and check @ref DL_MATHACL_STATUS_OVERFLOW
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* for overflow. */
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DL_MATHACL_OP_TYPE_SQUARE_32 = MATHACL_CTL_FUNC_SQUARE32,
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/*! Multiply operation returns 64-bit result -- takes in two operands */
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DL_MATHACL_OP_TYPE_MPY_64 = MATHACL_CTL_FUNC_MPY64,
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/*! Square operation returns 64-bit result -- takes in one operand */
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DL_MATHACL_OP_TYPE_SQUARE_64 = MATHACL_CTL_FUNC_SQUARE64,
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/*! Multiply and Accumulate operation -- takes in two operands. Supports Q
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* and int data formats. Enable saturation with @ref
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* DL_MathACL_enableSaturation and check @ref DL_MATHACL_STATUS_OVERFLOW
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* for overflow. */
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DL_MATHACL_OP_TYPE_MAC = MATHACL_CTL_FUNC_MAC,
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/*! Square and Accumulate operation -- takes in one operand. Supports Q and
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* int data formats. Enable saturation with @ref
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* DL_MathACL_enableSaturation and check @ref DL_MATHACL_STATUS_OVERFLOW
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* for overflow. */
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DL_MATHACL_OP_TYPE_SAC = MATHACL_CTL_FUNC_SAC,
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} DL_MATHACL_OP_TYPE;
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/*! @enum DL_MATHACL_Q_TYPE */
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typedef enum {
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/*! Q0 Operand Type */
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DL_MATHACL_Q_TYPE_Q0 = MATHACL_CTL_QVAL_Q0,
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/*! Q1 Operand Type */
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DL_MATHACL_Q_TYPE_Q1 = MATHACL_CTL_QVAL_Q1,
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/*! Q2 Operand Type */
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DL_MATHACL_Q_TYPE_Q2 = MATHACL_CTL_QVAL_Q2,
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/*! Q3 Operand Type */
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DL_MATHACL_Q_TYPE_Q3 = MATHACL_CTL_QVAL_Q3,
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/*! Q4 Operand Type */
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DL_MATHACL_Q_TYPE_Q4 = MATHACL_CTL_QVAL_Q4,
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/*! Q5 Operand Type */
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DL_MATHACL_Q_TYPE_Q5 = MATHACL_CTL_QVAL_Q5,
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/*! Q6 Operand Type */
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DL_MATHACL_Q_TYPE_Q6 = MATHACL_CTL_QVAL_Q6,
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/*! Q7 Operand Type */
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DL_MATHACL_Q_TYPE_Q7 = MATHACL_CTL_QVAL_Q7,
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/*! Q8 Operand Type */
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DL_MATHACL_Q_TYPE_Q8 = MATHACL_CTL_QVAL_Q8,
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/*! Q9 Operand Type */
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DL_MATHACL_Q_TYPE_Q9 = MATHACL_CTL_QVAL_Q9,
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/*! Q10 Operand Type */
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DL_MATHACL_Q_TYPE_Q10 = MATHACL_CTL_QVAL_Q10,
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/*! Q11 Operand Type */
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DL_MATHACL_Q_TYPE_Q11 = MATHACL_CTL_QVAL_Q11,
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/*! Q12 Operand Type */
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DL_MATHACL_Q_TYPE_Q12 = MATHACL_CTL_QVAL_Q12,
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/*! Q13 Operand Type */
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DL_MATHACL_Q_TYPE_Q13 = MATHACL_CTL_QVAL_Q13,
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/*! Q14 Operand Type */
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DL_MATHACL_Q_TYPE_Q14 = MATHACL_CTL_QVAL_Q14,
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/*! Q15 Operand Type */
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DL_MATHACL_Q_TYPE_Q15 = MATHACL_CTL_QVAL_Q15,
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/*! Q16 Operand Type */
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DL_MATHACL_Q_TYPE_Q16 = MATHACL_CTL_QVAL_Q16,
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/*! Q17 Operand Type */
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DL_MATHACL_Q_TYPE_Q17 = MATHACL_CTL_QVAL_Q17,
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/*! Q18 Operand Type */
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DL_MATHACL_Q_TYPE_Q18 = MATHACL_CTL_QVAL_Q18,
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/*! Q19 Operand Type */
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DL_MATHACL_Q_TYPE_Q19 = MATHACL_CTL_QVAL_Q19,
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/*! Q20 Operand Type */
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DL_MATHACL_Q_TYPE_Q20 = MATHACL_CTL_QVAL_Q20,
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/*! Q21 Operand Type */
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DL_MATHACL_Q_TYPE_Q21 = MATHACL_CTL_QVAL_Q21,
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/*! Q22 Operand Type */
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DL_MATHACL_Q_TYPE_Q22 = MATHACL_CTL_QVAL_Q22,
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/*! Q23 Operand Type */
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DL_MATHACL_Q_TYPE_Q23 = MATHACL_CTL_QVAL_Q23,
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/*! Q24 Operand Type */
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DL_MATHACL_Q_TYPE_Q24 = MATHACL_CTL_QVAL_Q24,
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/*! Q25 Operand Type */
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DL_MATHACL_Q_TYPE_Q25 = MATHACL_CTL_QVAL_Q25,
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/*! Q26 Operand Type */
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DL_MATHACL_Q_TYPE_Q26 = MATHACL_CTL_QVAL_Q26,
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/*! Q27 Operand Type */
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DL_MATHACL_Q_TYPE_Q27 = MATHACL_CTL_QVAL_Q27,
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/*! Q28 Operand Type */
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DL_MATHACL_Q_TYPE_Q28 = MATHACL_CTL_QVAL_Q28,
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/*! Q29 Operand Type */
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DL_MATHACL_Q_TYPE_Q29 = MATHACL_CTL_QVAL_Q29,
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/*! Q30 Operand Type */
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DL_MATHACL_Q_TYPE_Q30 = MATHACL_CTL_QVAL_Q30,
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/*! Q31 Operand Type */
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DL_MATHACL_Q_TYPE_Q31 = MATHACL_CTL_QVAL_Q31,
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} DL_MATHACL_Q_TYPE;
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/*! @enum DL_MATHACL_OPSIGN */
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typedef enum {
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/*! Unsigned operation type */
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DL_MATHACL_OPSIGN_UNSIGNED = MATHACL_CTL_OPTYPE_UNSIGNED,
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/*! Signed operation type */
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DL_MATHACL_OPSIGN_SIGNED = MATHACL_CTL_OPTYPE_SIGNED,
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} DL_MATHACL_OPSIGN;
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/**
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* @brief Configuration struct for @ref DL_MathACL_configOperation.
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*/
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typedef struct {
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/*! Operation type. Set to one of @ref DL_MATHACL_OP_TYPE */
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DL_MATHACL_OP_TYPE opType;
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/*! Operation sign type. One of @ref DL_MATHACL_OPSIGN */
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DL_MATHACL_OPSIGN opSign;
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/*! Number of iterations, for applicable operation types. Supported types
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include trigonometric operations and square root. */
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uint32_t iterations;
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/*! Scaling factor on the input in division operations. Leave as 0
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for non-division operations. */
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uint32_t scaleFactor;
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/*! Q value for the operand inputs for the operation */
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DL_MATHACL_Q_TYPE qType;
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} DL_MathACL_operationConfig;
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/**
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* @brief Enables the Peripheral Write Enable (PWREN) register for the MATHACL
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*
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* Before any peripheral registers can be configured by software, the
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* peripheral itself must be enabled by writing the ENABLE bit together with
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* the appropriate KEY value to the peripheral's PWREN register.
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*/
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__STATIC_INLINE void DL_MathACL_enablePower(MATHACL_Regs *mathacl)
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{
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mathacl->GPRCM.PWREN =
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MATHACL_PWREN_KEY_UNLOCK_W | MATHACL_PWREN_ENABLE_ENABLE;
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}
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/**
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* @brief Disables the Peripheral Write Enable (PWREN) register for the MATHACL
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*
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* When the PWREN.ENABLE bit is cleared, the peripheral's registers are not
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* accessible for read/write operations.
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*
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* @note This API does not provide large power savings.
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*/
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__STATIC_INLINE void DL_MathACL_disablePower(MATHACL_Regs *mathacl)
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{
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mathacl->GPRCM.PWREN =
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MATHACL_PWREN_KEY_UNLOCK_W | MATHACL_PWREN_ENABLE_DISABLE;
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}
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/**
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* @brief Returns if the Peripheral Write Enable (PWREN) register for the MATHACL
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* is enabled
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*
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* Before any peripheral registers can be configured by software, the
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* peripheral itself must be enabled by writing the ENABLE bit together with
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* the appropriate KEY value to the peripheral's PWREN register.
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*
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* When the PWREN.ENABLE bit is cleared, the peripheral's registers are not
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* accessible for read/write operations.
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*
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* @return true if peripheral register access is enabled
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* @return false if peripheral register access is disabled
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*/
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__STATIC_INLINE bool DL_MathACL_isPowerEnabled(MATHACL_Regs *mathacl)
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{
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return ((mathacl->GPRCM.PWREN & MATHACL_PWREN_ENABLE_MASK) ==
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MATHACL_PWREN_ENABLE_ENABLE);
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}
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/**
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* @brief Resets the MATHACL module
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*/
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__STATIC_INLINE void DL_MathACL_reset(MATHACL_Regs *mathacl)
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{
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mathacl->GPRCM.RSTCTL =
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MATHACL_RSTCTL_RESETASSERT_ASSERT | MATHACL_RSTCTL_KEY_UNLOCK_W;
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}
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/**
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* @brief Returns if MATHACL peripheral was reset
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*
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* @param mathacl Pointer to the register overlay for the MATHACL peripheral
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*
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* @return true if peripheral was reset
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* @return false if peripheral wasn't reset
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*
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*/
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__STATIC_INLINE bool DL_MathACL_isReset(const MATHACL_Regs *mathacl)
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{
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return (mathacl->GPRCM.STAT & MATHACL_STAT_RESETSTKY_MASK) ==
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MATHACL_STAT_RESETSTKY_RESET;
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}
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/**
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* @brief Enable saturation
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*
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* This bit is shared among @ref DL_MATHACL_OP_TYPE_DIV, @ref
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* DL_MATHACL_OP_TYPE_SQUARE_32, @ref DL_MATHACL_OP_TYPE_MPY_32, @ref
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* DL_MATHACL_OP_TYPE_MAC, and @ref DL_MATHACL_OP_TYPE_SAC operations.
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* When saturation is enabled, if there is an overflow event during an
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* operation, then the result will saturate to the maximum value.
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*
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* @sa DL_MATHACL_STATUS_OVERFLOW
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*/
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__STATIC_INLINE void DL_MathACL_enableSaturation(MATHACL_Regs *mathacl)
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{
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mathacl->CTL |= MATHACL_CTL_SATEN_ENABLE;
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}
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/**
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* @brief Disable saturation
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*
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* When saturation is disabled, if there is an overflow event during an
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* operation, then the result will overflow to an unknown value.
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*
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* @param mathacl Pointer to the register overlay for the peripheral
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*/
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__STATIC_INLINE void DL_MathACL_disableSaturation(MATHACL_Regs *mathacl)
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{
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mathacl->CTL &= ~(MATHACL_CTL_SATEN_MASK);
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}
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/**
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* @brief Returns if saturation is enabled
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*
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* @param mathacl Pointer to the register overlay for the MATHACL peripheral
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*
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* @return true if saturation is enabled
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* @return false if saturation is not enabled
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*
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*/
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__STATIC_INLINE bool DL_MathACL_isSaturationEnabled(
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const MATHACL_Regs *mathacl)
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{
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return (
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(mathacl->CTL & MATHACL_CTL_SATEN_MASK) == MATHACL_CTL_SATEN_ENABLE);
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}
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/**
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* @brief Load Operand one into the math accelerator
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* @param[in] mathacl Pointer to the register overlay for the peripheral
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*
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* @param[in] op Operand one to load into the Math Accelerator
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*
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*/
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__STATIC_INLINE void DL_MathACL_setOperandOne(
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MATHACL_Regs *mathacl, uint32_t op)
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{
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mathacl->OP1 = op;
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}
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/**
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* @brief Load Operand two into the math accelerator
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*
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* @param[in] mathacl Pointer to the register overlay for the peripheral
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*
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* @param[in] op Operand two to load into the Math Accelerator
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*
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*/
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__STATIC_INLINE void DL_MathACL_setOperandTwo(
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MATHACL_Regs *mathacl, uint32_t op)
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{
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mathacl->OP2 = op;
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}
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/**
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* @param[in] mathacl Pointer to the register overlay for the peripheral
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*
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* @brief Returns MATHACL result one register
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*
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* @return Value stored in MATHACUL Result 1 status
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*/
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__STATIC_INLINE uint32_t DL_MathACL_getResultOne(const MATHACL_Regs *mathacl)
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{
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return mathacl->RES1;
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}
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/**
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* @param[in] mathacl Pointer to the register overlay for the peripheral
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*
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* @brief Returns MATHACL result two register
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*
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* @return Value stored in MATHACUL Result 2 status
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*
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*/
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__STATIC_INLINE uint32_t DL_MathACL_getResultTwo(const MATHACL_Regs *mathacl)
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{
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return mathacl->RES2;
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}
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/**
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* @param[in] mathacl Pointer to the register overlay for the peripheral
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*
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* @brief Returns MATHACL operation status
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*
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* @return One of @ref DL_MATHACL_STATUS
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*
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*/
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__STATIC_INLINE uint32_t DL_MathACL_getStatus(const MATHACL_Regs *mathacl)
|
|
{
|
|
return mathacl->STATUS;
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the overflow status bit
|
|
*
|
|
* Calling this API clears @ref DL_MATHACL_STATUS_OVERFLOW
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
* @sa DL_MATHACL_STATUS_OVERFLOW
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearOverflowStatus(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->STATUSCLR |= MATHACL_STATUSCLR_CLR_OVF_CLR;
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the underflow status bit
|
|
*
|
|
* Calling this API clears @ref DL_MATHACL_STATUS_UNDERFLOW
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
* @sa DL_MATHACL_STATUS_UNDERFLOW
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearUnderflowStatus(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->STATUSCLR |= MATHACL_STATUSCLR_CLR_UF_CLR;
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the error status bit
|
|
*
|
|
* Calling this API clears @ref DL_MATHACL_STATUS_ERR_MASK
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
* @sa DL_MATHACL_STATUS_ERR_MASK
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearErrorStatus(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->STATUSCLR |= MATHACL_STATUSCLR_CLR_ERR_CLR;
|
|
}
|
|
|
|
/**
|
|
* @brief Block until MATHACL_STATUS_BUSY_DONE is active in MATHACL
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_waitForOperation(const MATHACL_Regs *mathacl)
|
|
{
|
|
while ((mathacl->STATUS & MATHACL_STATUS_BUSY_MASK) ==
|
|
MATHACL_STATUS_BUSY_NOTDONE) {
|
|
;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Configure and execute a Math accelerator operation
|
|
*
|
|
* @pre Call @ref DL_MathACL_clearResults when configuring the MATHACL
|
|
* for performing @ref DL_MATHACL_OP_TYPE_MAC and
|
|
* @ref DL_MATHACL_OP_TYPE_SAC operations.
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
* @param[in] opConfig Pointer to the configuration structure for the
|
|
* operation
|
|
*
|
|
* @param[in] op1 Operand one for the operation
|
|
*
|
|
* @param[in] op2 Operand two for the operation. May be left as 0
|
|
* if unused
|
|
*
|
|
*/
|
|
void DL_MathACL_configOperation(MATHACL_Regs *mathacl,
|
|
const DL_MathACL_operationConfig *opConfig, uint32_t op1, uint32_t op2);
|
|
|
|
/**
|
|
* @brief Clears the RES1 register
|
|
*
|
|
* Clears the Result 1 (RES1) register
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearResultOne(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->RES1 = 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Clears the RES2 register
|
|
*
|
|
* Clears the Result 2 (RES2) register
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearResultTwo(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->RES2 = 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Clears the RES1 and RES2 registers
|
|
*
|
|
* Clears the Result 1 (RES1) and Result 2 (RES2) registers
|
|
*
|
|
* @param[in] mathacl Pointer to the register overlay for the peripheral
|
|
*
|
|
*/
|
|
__STATIC_INLINE void DL_MathACL_clearResults(MATHACL_Regs *mathacl)
|
|
{
|
|
mathacl->RES1 = 0;
|
|
mathacl->RES2 = 0;
|
|
}
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __MSPM0_HAS_MATHACL__ */
|
|
|
|
#endif /* ti_dl_mathacl__include */
|
|
/** @}*/
|